About
HFz Solutions develops specialized digital logic architectures and dedicated hardware IP for specific computational functions.
The development approach focuses on dedicated hardware structures, logic-level optimization, and application-specific digital design.
Current Development
DecScale 32-bit
DecScale is a specialized 32-bit hardware IP combining dedicated decimal scaling and arithmetic functions in a single digital architecture.
The design is being developed and evaluated through digital logic simulation, FPGA prototyping, synthesis, physical implementation, and ASIC-oriented analysis.
Technical documentation — Work in Progress
The following document is an incomplete development document. It is currently under construction and does not yet represent the final technical specification of DecScale.
View the DecScale technical document (PDF — Work in Progress)
Development Approach
- Digital logic design
- Dedicated combinational hardware architectures
- RTL and logic-level verification
- FPGA prototyping
- ASIC-oriented synthesis and physical implementation
- Post-layout timing and circuit analysis
Status
This website and the associated technical documentation are currently under development.